Product Specification
Power Supply Supervisor + Regulator + PWM |
SG6105 |
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FEATURES
PC half-bridge (or 494) power supply supervisor + two 431 + PWM
High integration & few external components Over-voltage protection for 3.3V, 5V and 12V Under-voltage protection for 3.3V, 5V and 12V Under-voltage protection for –12V and/or –5V Over-power and short-circuit protection Power-down warning circuitry
Power good circuitry
Delay time for PSON and PG signal Remote ON/OFF function
On-chip oscillator and error amplifier
Two shunt regulator for 3.3V and 5V-Standby Latching PWM for cycle-by-cycle switching Push-pull PWM operation and totem pole outputs Soft-start and maximum 93% duty cycle
APPLICATIONS
Switching mode power supply for Computers, such
as:
ATX |
NLX |
SFX (micro-ATX) |
DESCRIPTION
SG6105 controller is designed for switching mode power supply for desktop PCs. It provides all the functions necessary to monitor and control the output of the power supply. Remote ON/OFF control, power good circuitry, some protection features against over-voltage and over-power are implemented. It directly senses all the output rails for OVP without the need of external dividers. An innovated AC-signal sampling circuitry provides a sufficient power-down warning signal for PG. A built-in timer generates accuracy timing for control circuit including the PS-off delay. The cycle-by-cycle PWM switching prevents the power transformer from the saturation and ensures the fastest response for the short-circuit protection which greatly reduce the stress for power transistors. Two internal precision TL431 shunt regulators provide stable reference voltage and driver for 3.3V and 5V-standby regulation. Utilizing minimum number of external components, the SG6105 includes all of the functions for push-pull and/or half-bridge topology, decreasing the production cost and PCB space, and increasing the MTBF for power supply.
MARKING DIAGRAMS |
PIN CONFIGURATION |
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20 |
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PSON |
1 |
20 |
VCC |
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SG6105TP |
V33 |
2 |
19 |
RI |
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XXXXXXXYYWWV |
V5 |
3 |
18 |
SS |
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OPP |
4 |
17 |
IN |
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1 |
UVAC |
5 |
16 |
COMP |
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NVP |
6 |
15 |
GND |
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T: D = DIP |
V12 |
7 |
14 |
FB1 |
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OP2 |
8 |
13 |
VREF1 |
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P : Z = Lead Free |
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Null=regular package |
OP1 |
9 |
12 |
VREF2 |
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XXXXXXX: Wafer Lot |
PG |
10 |
11 |
FB2 |
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YY: Year; WW: Week |
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V: Assembly Location |
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©System General Corp. |
- 1 - |
www.sg.com.tw |
Version 2.4(IRO33.0011.B1) |
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Apr.7, 2004 |
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Product Specification |
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Power Supply Supervisor + Regulator + PWM |
SG6105 |
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ORDERING INFORMATION |
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Part Number |
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Package |
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SG6105D |
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20-Pin DIP |
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SG6105DZ |
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20-Pin DIP(Lead Free) |
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PIN DESCRIPTIONS |
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Name |
Pin |
Type |
Function |
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VCC |
20 |
Supply |
Supply voltage. 4.5V ~ 5.5V. It is connected to 5V-standby. |
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PG |
10 |
Logic output |
Power Good logic output, 0 or 1 (open-collector). PG = 1 means that the power is good for operation. |
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The PG delay is 300 msec. |
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V33 |
2 |
Analog input |
3.3V over-voltage/under-voltage control sense input. |
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V5 |
3 |
Analog input |
5V over-voltage/under-voltage control sense input. |
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V12 |
7 |
Analog input |
12V over-voltage/under-voltage control sense input. |
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OPP |
4 |
Analog input |
Over-power sense input. This pin is connected to driver transformer or the output of current |
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transformer. When not in use, this pin should be grounded. |
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Remote On/Off logic input for CPU or controller. Turn on/off the PWM Output after the 7.5 msec / 26 |
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PSON |
1 |
Logic input |
msec delay. |
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PSON = 0 means that the main SMPS is operational. |
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PSON =1 means that the main SMPS is off and the latch is reset. |
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NVP |
6 |
Analog input |
The protection input for negative output, such as –12V and/or –5V. Trip voltage = 2.1V. |
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UVAC |
5 |
Analog input |
AC fail detection, detect main AC voltage under-voltage and/or failure. |
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COMP |
16 |
Analog output |
Error amplifier output and the input of the PWM comparator. |
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IN |
17 |
Analog input |
The negative input of error amplifier. The positive input of error amplifier is a 2.5V reference voltage. |
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SS |
18 |
Analog input |
The soft-start. It is settable through external capacitor. The current source output at this pin is 8uA and |
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the voltage is clamped at 2.5V. |
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OP1/OP2 |
9/8 |
Analog output |
The totem-pole output drivers of push-pull PWM. The output are enabled (low) only when the NAND |
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gate inputs are high, the maximum duty cycle on an output (OP1 or OP2) is 46%. |
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FB1 |
14 |
Analog output |
Output for first converter regulation loop. |
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VREF1 |
13 |
Analog input |
Reference comparison input for first converter regulation loop. 2.5V. |
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FB2 |
11 |
Analog output |
Output for second converter regulation loop. |
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VREF2 |
12 |
Analog input |
Reference comparison input for second converter regulation loop. 2.5V. |
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RI |
19 |
Program. |
Connected to external resistor for the reference setting. |
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Analog input |
RI = 75k ohms. |
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GND |
15 |
Supply |
Ground. |
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©System General Corp. |
- 2 - |
www.sg.com.tw |
Version 2.4(IRO33.0011.B1) |
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Apr.7, 2004 |
Product Specification
Power Supply Supervisor + Regulator + PWM |
SG6105 |
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BLOCK DIAGRAM
V33 |
V5 |
V12 |
UVAC |
RI |
PG |
GND |
VCC |
2 
3 
7 
5 
19 
10 
15 
20 
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DSD |
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UV |
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2uA |
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Vref |
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14 |
FB1 |
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Detector |
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COMP |
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13 |
VREF1 |
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0.7V |
+ |
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OV |
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Delay |
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Protector |
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300msec |
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11 |
FB2 |
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UV |
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Delay |
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12 |
VREF2 |
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Protector |
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3sec |
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5V |
3.2V |
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COMP |
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+ |
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64uA |
2.1V |
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COMP |
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Vcc |
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2.5V |
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Delay |
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NVP |
6 |
Buffer |
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+ |
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7msec |
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D |
Q |
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9 |
OP1 |
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2.4V |
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COMP |
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D |
Q |
8uA |
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CK |
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CK |
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+ |
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Q |
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OPP |
4 |
Buffer |
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+ |
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Delay |
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COMP |
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R |
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7msec |
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+ |
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O.S.C |
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Vcc |
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Delay |
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Error |
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15msec |
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Amp |
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1.4V |
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COMP |
On/Off Delay |
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S |
Q |
8 |
OP2 |
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Delay |
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26msec |
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PSON |
1 |
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2msec |
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R |
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7.5msec |
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18 |
17 |
16 |
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SS |
IN |
COMP |
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©System General Corp. |
- 3 - |
www.sg.com.tw |
Version 2.4(IRO33.0011.B1) |
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Apr.7, 2004 |
Product Specification
Power Supply Supervisor + Regulator + PWM |
SG6105 |
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TIMING DIAGRAM
VCC
PSON
3.3V,5V,12V
NVP |
tPSON(ON) |
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tUVP |
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tPSON(OFF) |
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tNVP |
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SS(on/off)
tPSOFF
PG
tPG
VCC
PSON
Voltage < VUVAC
UVAC
OPP
tOPP
SS(on/off)
PG
©System General Corp. |
- 4 - |
www.sg.com.tw |
Version 2.4(IRO33.0011.B1) |
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Apr.7, 2004 |
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Product Specification |
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Power Supply Supervisor + Regulator + PWM |
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SG6105 |
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ABSOLUTE MAXIMUM RATINGS |
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Symbol |
Parameter |
Value |
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Unit |
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VCC |
DC Supply Voltage at Pin 20 |
16 |
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V |
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VFB |
Shunt Regulator Output at Fb1, Fb2 Pins |
16 |
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V |
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IOUT |
Output Current at PG, Fb1, Fb2 Pins |
30 |
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mA |
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PD,25 |
Power Dissipation (TA=25 ) |
1.5 |
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W |
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PD,90 |
Power Dissipation (TA=90 ) |
0.5 |
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W |
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TSTG |
Storage Temperature Range |
-55 to +150 |
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RθJA |
Thermal Resistance, Junction-To-Air |
82.5 |
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TJ,MAX |
Operating Junction Temperature |
150 |
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TA,MAX |
Operating Ambient Temperature |
-30 to +125 |
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TL |
Lead Temperature (Soldering, 10sec) |
260 |
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ESD Capability, HBM model |
3.0 |
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kV |
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Note: All voltage values, except differential voltage, are with respect to network ground terminal.
RECOMMENDED OPERATING CONDITIONS
Symbol |
Parameter |
Value |
Unit |
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VCC |
DC Supply Voltage at Pin 20 |
4.5 to 5.5 |
V |
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VFB |
Shunt Regulator Output at Fb1, Fb2 Pins |
4 to 16 |
V |
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TOPER |
Operating Ambient Temperature Range |
-25 to +85 |
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ELECTRICAL CHARACTERISTICS (VCC = 5V, TA = 25°C)
Symbol |
Parameter |
Test Condition |
Min. |
Typ. |
Max. |
Unit |
ICC |
Total Supply Current |
PG High |
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5 |
10 |
mA |
VOVP1 |
Over-Voltage Protection 3.3V |
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3.9 |
4.1 |
4.3 |
V |
VOVP2 |
Over-Voltage Protection 5V |
- |
5.8 |
6.1 |
6.5 |
V |
VOVP3 |
Over-Voltage Protection 12V |
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13.9 |
14.5 |
14.9 |
V |
VUVP1 |
Under-Voltage Protection 3.3V |
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2.0 |
2.6 |
2.8 |
V |
VUVP2 |
Under-Voltage Protection 5V |
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3.0 |
3.6 |
3.9 |
V |
VUVP3 |
Under-Voltage Protection 12V |
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6.0 |
7.2 |
8.0 |
V |
VUVS1 |
Under-Voltage Sense 3.3V for PG Low |
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2.5 |
2.8 |
3.0 |
V |
VUVS2 |
Under-Voltage Sense 5V for PG Low |
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4.0 |
4.3 |
4.5 |
V |
VUVS3 |
Under-Voltage Sense 12V for PG Low |
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9.4 |
10.1 |
10.4 |
V |
VOPPS* 1 |
Over-Power Protection. |
VUVAC = 1.5V |
2.02 |
2.4 |
2.66 |
V |
VNVP |
Negative Voltage Protection: Voltage Level |
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2.0 |
2.1 |
2.2 |
V |
INVP |
Negative Voltage Protection: Source Current |
RI = 75kΩ |
57 |
64 |
72 |
uA |
tOVP |
Timing for Over-Voltage Protection |
RI = 75kΩ |
0.37 |
0.7 |
1.35 |
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tUVP |
Timing for Under-Voltage Protection |
RI = 75kΩ |
0.8 |
2.4 |
3.75 |
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tUVS |
Timing for Under-Voltage Sense for PG Low |
RI = 75kΩ |
0.37 |
1.2 |
1.88 |
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tOPP |
Timing for Over-Power-Protection |
RI = 75kΩ |
3.3 |
7 |
11.3 |
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tNVP |
Timing for Negative Voltage Protection |
RI = 75kΩ |
3.3 |
7 |
10.2 |
ms |
Note *1: VOPPS = (2/3) x VOPP + (1/3) x VUVAC ;
©System General Corp. |
- 5 - |
www.sg.com.tw |
Version 2.4(IRO33.0011.B1) |
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Apr.7, 2004 |