Материал: 9100

Insulated Gate Bipolar Transistor

BUK856-400 IZ

Protected Logic-Level IGBT

GENERAL DESCRIPTION

QUICK REFERENCE DATA

Protected N-channel logic-level

SYMBOL

PARAMETER

MIN.

TYP.

MAX.

UNIT

insulated gate bipolar power

transistor in a plastic envelope,

V(CL)CER

Collector-emitter clamp voltage

350

400

500

V

intended for automotive ignition

VCEsat

Collector-emitter on-state voltage

2.2

V

applications. The device has

IC

Collector current (DC)

20

A

built-in zener diodes providing

Ptot

Total power dissipation

100

W

active collector voltage clamping

ECERS

Clamped energy dissipation

300

mJ

and ESD protection up to 2 kV.

PINNING - TO220AB

PIN CONFIGURATION

SYMBOL

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

VCE

Collecter-emitter voltage

tp ≤ 500 μs

-

500

V

VCE

Collector-emitter voltage

Continuous

-20

50

V

±VGE

Gate-emitter voltage

-

-

12

V

IC

Collector current (DC)

Tmb = 100 ˚C

-

10

A

IC

Collector current (DC)

Tmb =

25 ˚C

-

20

A

ICM

Collector current (pulsed peak value,

Tmb

=

25 ˚C; tp ≤ 10 ms;

-

25

A

on-state)

VCE

≤ 15 V

ICLM

Collector current (clamped inductive

1 kΩ ≤ RG ≤ 10 kΩ

-

10

A

load)

Tmb = 25 ˚C; IC = 10 A; RG = 1 kΩ;

ECERS

Clamped turn-off energy

-

300

mJ

(non-repetitive)

see Figs. 23,24

1

Clamped turn-off energy (repetitive)

Tmb = 100 ˚C; IC = 8 A; RG = 1 kΩ;

-

125

mJ

ECERR

1

f = 50 Hz

Reverse avalanche energy

IE = 1 A; f = 50 Hz

-

5

mJ

EECR

(repetitive)

Ptot

Total power dissipation

Tmb =

25 ˚C

-

125

W

Tstg

Storage temperature

-

-55

150

˚C

Tj

Operating Junction Temperature

-

-40

150

˚C

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

VC

Electrostatic discharge capacitor

Human body model

-

2

kV

voltage

(100 pF, 1.5 kΩ)

August 1994

1

Rev. 1.100

Insulated Gate Bipolar Transistor

BUK856-400 IZ

Protected Logic-Level IGBT

THERMAL RESISTANCES

SYMBOL

PARAMETER

CONDITIONS

TYP.

MAX.

UNIT

Rth j-mb

Junction to mounting base

-

1.0

K/W

Rth j-a

Junction to ambient

In free air

60

-

K/W

STATIC CHARACTERISTICS

Tmb = 25 ˚C unless otherwise specified

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

V(BR)CG

Collector-gate zener

5 mA ≤ -IG ≤ 2 mA; -40 ≤ Tj ≤150˚C

350

400

500

V

breakdown voltage

V(BR)EC

Reverse collector-emitter

IE = 10 mA

20

30

50

V

±V(BR)GES

breakdown voltage

IG = ± 1 mA

Gate-emitter breakdown

12

16

20

V

voltage

VGE(TO)

Gate threshold voltage

VCE = VGE; IC = 1 mA

1

1.5

2

V

VGE(TO)

Gate threshold voltage

VCE

= VGE; IC = 1 mA;

0.6

-

2.4

V

-40

≤ Tj ≤150˚C

μA

ICES

Zero gate voltage collector

VCE = 50 V; VGE = 0 V; Tj = 25 ˚C

-

0.01

10

current

ICES

Zero gate voltage collector

Tj = 125 ˚C

-

0.01

1

mA

current

IEC

Reverse collector current

VCE = -20 V

-

0.2

5

mA

IEC

Reverse collector current

VCE = -20 V; Tj = 125˚C

-

2

20

mA

IGES

Gate emitter leakage current

VGE = ±6 V

-

0.1

1

μA

Tj = 150˚C

-

5

100

μA

VCEsat

Collector-emitter on-state

VGE = 4.5 V; IC = 8 A

-

1.2

2.2

V

voltage

VGE

= 3.5 V; IC = 6 A;

-

1.2

2.2

V

-40

≤ Tj ≤150˚C

DYNAMIC CHARACTERISTICS

Tmb = 25 ˚C unless otherwise specified

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

V(CL)CER

Collector-emitter clamp voltage

RG

= 1 kΩ; IC = 10 A;

350

400

500

V

(peak value)

-40

≤ Tj ≤150˚C; Inductive load; see

Figs. 23,24

gfe

Forward transconductance

VCE = 15 V; IC = 4 A

5.5

15

20

S

Cies

Input capacitance

VGE = 0 V; VCE = 25 V; f = 1 MHz

-

940

1200

pF

Coes

Output capacitance

-

95

130

pF

Cres

Feedback capacitance

-

30

50

pF

td off

Turn-off delay time

IC = 8 A; VCL = 300 V; RG = 1 kΩ;

-

13

18

μs

tf

Fall time

VGE = 5 V; Tj = 125˚C;

-

6

10

μs

tc

Crossover Time

Inductive load; see Figs. 20,21

-

12

-

μs

Eoff

Turn-off Energy loss

-

13

-

mJ

August 1994

2

Rev. 1.100

Philips Semiconductors

Product specification

Insulated Gate Bipolar Transistor

BUK856-400 IZ

Protected Logic-Level IGBT

1E+01

Zth(j-mb) / (K/W)

120

PD%

Normalised Power Derating

110

D=

100

1E+00

90

0.5

80

0.2

70

1E-01

0.1

60

0.05

50

0.02

40

1E-02

P

t p

D =

tp

30

D

T

20

0

T

t

10

1E-03

0

0

20

40

60

80

100

120

140

1E-07

1E-05

1E-03

1E-01

1E+01

t / s

Tmb /

C

Fig.1.

Transient thermal impedance

Fig.4.

Normalised power dissipation.

Z th j-mb = f(t) ; parameter D = tp/T

PD% = 100.PD/PD 25˚C = f(Tmb)

IC / A

BUK8Y6-400IZ

15

ICLM / A

BUK8Y6-400IZ

10

I CLM

10

Self-clamped

1

5

0.1

0

200

400

600

0

0

50

100

150

200

VCE / V

dVCE/dt (V/us)

Fig.2.

Turn-off Safe Operating Area

Fig.5. Derating of ICLM with turn-off dVCE/dt

conditions: Tj

£ Tjmax. ; RG

³ 1 kW

conditions: VCE £

500 V; Tj

£ Tjmax.

3

VCE / V

PMG35A

2

VCE / V

PMG35A

150

150

Tj / C =

25

Tj / C =

25

-40

-40

1.5

2

1

1

0.5

0

0

4

8

12

16

20

24

0

0

4

8

12

16

20

24

IC / A

IC / A

Fig.3. Typical On-state Voltage

Fig.6. Typical On-state Voltage

VCEsat = f(IC); parameter Tj; conditions: VGE = 3.5 V

VCEsat = f(IC); parameter Tj; conditions: VGE = 5 V

August 1994

3

Rev. 1.100

Philips Semiconductors

Product specification

Insulated Gate Bipolar Transistor

BUK856-400 IZ

Protected Logic-Level IGBT

August 1994

4

Rev. 1.100

Philips Semiconductors

Product specification

Insulated Gate Bipolar Transistor

BUK856-400 IZ

Protected Logic-Level IGBT

August 1994

5

Rev. 1.100