Материал: AMBA_v30_AXI_v10
ARM IHI 0022B
Copyright © 2003, 2004 ARM Limited. All rights reserved.
6-1
Chapter 6
Atomic Accesses
This chapter describes how the AXI protocol implements exclusive access and locked
access mechanisms. It contains the following sections:
•
•
•
Atomic Accesses
6-2
Copyright © 2003, 2004 ARM Limited. All rights reserved.
ARM IHI 0022B
6.1
About atomic accesses
To enable the implementation of atomic access primitives, the
ARLOCK[1:0]
or
AWLOCK[1:0]
signal provides exclusive access and locked access. Table 6-1 shows
the encoding of the
ARLOCK[1:0]
and
AWLOCK[1:0]
signals.
Table 6-1 Atomic access encoding
ARLOCK[1:0]
AWLOCK[1:0]
Access type
b00
Normal access
b01
Exclusive access
b10
Locked access
b11
Reserved
Atomic Accesses
ARM IHI 0022B
Copyright © 2003, 2004 ARM Limited. All rights reserved.
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6.2
Exclusive access
The exclusive access mechanism enables the implementation of semaphore type
operations without requiring the bus to remain locked to a particular master for the
duration of the operation. The advantage of exclusive access is that semaphore type
operations do not impact either the critical bus access latency or the maximum
achievable bandwidth.
The
ARLOCK[1:0]
or
AWLOCK[1:0]
signal selects exclusive access, and the
RRESP[1:0]
or
BRESP[1:0]
signal (see Table 7-1 on page 7-2) indicates the success
or failure of the exclusive access.
The slave must have additional logic to support exclusive access. The AXI protocol
provides a fail-safe mechanism to indicate when a master attempts an exclusive access
to a slave that does not support it.
6.2.1
Exclusive access process
The basic process for an exclusive access is:
1.
A master performs an exclusive read from an address location.
2.
At some later time, the master attempts to complete the exclusive operation by
performing an exclusive write to the same address location.
3.
The exclusive write access of the master is signalled as:
•
Successful if no other master has written to that location between the read
and write accesses.
•
Failed if another master has written to that location between the read and
write accesses. In this case the address location is not updated.
Note
A master might not complete the write portion of an exclusive operation. The
exclusive access monitoring hardware must monitor only one address per
transaction ID. Therefore, if a master does not complete the write portion of an
exclusive operation, a subsequent exclusive read changes the address that is being
monitored for exclusivity.
6.2.2
Exclusive access from the perspective of the master
A master starts an exclusive operation by performing an exclusive read. This usually
returns the EXOKAY response from the slave, indicating that the slave recorded the
address to be monitored.
Atomic Accesses
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Copyright © 2003, 2004 ARM Limited. All rights reserved.
ARM IHI 0022B
Note
If the master attempts an exclusive read from a slave that does not support exclusive
accesses, the slave returns the OKAY response instead of the EXOKAY response. The
master can treat this as an error condition indicating that the exclusive access is not
supported. It is recommended that the master not perform the write portion of this
exclusive operation.
At some time after the exclusive read, the master tries an exclusive write to the same
location. If the location has not changed since the exclusive read, the exclusive write
operation succeeds. The slave returns the EXOKAY response, and the exclusive write
updates the memory location.
If the address location has changed since the exclusive read, the exclusive write attempt
fails, and the slave returns the OKAY response instead of the EXOKAY response. The
exclusive write attempt does not update the memory location.
A master might not complete the write portion of an exclusive operation. If this
happens, the slave continues to monitor the address for exclusivity until another
exclusive read initiates a new exclusive access.
A master must not commence the write portion of an exclusive access until the read
portion is complete.
6.2.3
Exclusive access from the perspective of the slave
A slave that is not capable of supporting exclusive accesses can ignore the
ARLOCK[1:0]
and
AWLOCK[1:0]
signals. It must provide an OKAY response for
both normal and exclusive accesses.
A slave that supports exclusive access must have monitor hardware. It is recommended
that such a slave has a monitor unit for each exclusive-capable master ID that can access
it. A single-ported slave can have a standard exclusive access monitor external to the
slave, but multiported slaves might require internal monitoring.
The exclusive access monitor records the address and
ARID
value of any exclusive read
operation. Then it monitors that location until either a write occurs to that location or
until another exclusive read with the same
ARID
value resets the monitor to a different
address.
When an exclusive write occurs with a given
AWID
value then the monitor checks to
see if that address is being monitored for exclusivity. If it is, then this implies that no
write has occurred to that location, and the exclusive write proceeds, completing the
exclusive access. The slave returns the EXOKAY response to the master.
Atomic Accesses
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If the address is no longer being monitored at the time of an exclusive write, this implies
one of the following:
•
the location has been updated since the exclusive read
•
the monitor has been reset to another location.
In both cases the exclusive write must not update the address location, and the slave
must return the OKAY response instead of the EXOKAY response.
6.2.4
Exclusive access restrictions
The following restrictions apply to exclusive accesses:
•
The size and length of an exclusive write with a given ID must be the same as the
size and length of the preceding exclusive read with the same ID.
•
The address of an exclusive access must be aligned to the total number of bytes
in the transaction.
•
The address for the exclusive read and the exclusive write must be identical.
•
The
ARID
field of the read portion of the exclusive access must match the
AWID
of the write portion.
•
The control signals for the read and write portions of the exclusive access must be
identical.
•
The number of bytes to be transferred in an exclusive access burst must be a power
of 2, that is, 1, 2, 4, 8, 16, 32, 64, or 128 bytes.
•
The maximum number of bytes that can be transferred in an exclusive burst is
128.
•
The value of the
ARCACHE[3:0]
or
AWCACHE[3:0]
signals must guarantee
that the slave that is monitoring the exclusive access sees the transaction. For
example, an exclusive access being monitored by a slave must not have an
ARCACHE[3:0]
or
AWCACHE[3:0]
value that indicates that the transaction is
cacheable.
Failure to observe these restrictions causes Unpredictable behavior.
The minimum number of bytes to be monitored during an exclusive operation is defined
by the length and size of the transaction. It is acceptable to monitor a larger number of
bytes, up to 128 which is the maximum of an exclusive access. However, this might
result in occasions when the exclusive access is actually successful but is indicated as
failing because a neighboring byte was updated.